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|Title:||Low-Cost Real-Time Stereo Vision Hardware with Binary Confidence Metric and Disparity Refinement||Authors:||MOTTEN, Andy
|Issue Date:||2011||Source:||Proceedings of the International Conference on Multimedia Technology ICMT, p. 3559-3562||Abstract:||This paper presents a real-time stereo vision System-on-Chip (SoC) architecture for a depth-field generation processor as required in 3D TV applications. This architecture includes post-processing steps like a decision tree based confidence metric and a disparity refinement module while still fitting in a low cost FPGA. A real-time stereo matching calculation at a frame rate of 56 Hz with a resolution of 800 × 600 and a disparity of 80 has been realized using this architecture without the need for external memories.||Keywords:||real-time stereo matching; low-cost; real-time; confidence metric, adaptable window; computer vision; Parallel memory architecture; system-on-chip; FPGA; 3D-TV; depth image||Document URI:||http://hdl.handle.net/1942/13089||ISBN:||978-1-61284-771-9||DOI:||10.1109/ICMT.2011.6002155||Category:||C1||Type:||Proceedings Paper|
|Appears in Collections:||Research publications|
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