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http://hdl.handle.net/1942/14262
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DC Field | Value | Language |
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dc.contributor.author | MOTTEN, Andy | - |
dc.contributor.author | CLAESEN, Luc | - |
dc.contributor.author | Pan, Yun | - |
dc.date.accessioned | 2012-10-19T12:16:35Z | - |
dc.date.available | 2012-10-19T12:16:35Z | - |
dc.date.issued | 2012 | - |
dc.identifier.citation | Katkoori Srinivas; Guthaus, Matthew; Coskun, Ayse; Burg, Andreas; Reis, Ricardo (Ed.). 2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC), p. 247-250. | - |
dc.identifier.isbn | 9781467326582 | - |
dc.identifier.issn | 2324-8432 | - |
dc.identifier.uri | http://hdl.handle.net/1942/14262 | - |
dc.description.abstract | This paper presents a real-time trinocular disparity processor. The core module performs a pairwise segmented window matching for both the center-right and center-left image pair as their scaled down image pairs. The resulting cost functions are combined which results into nine different curves. A hierarchical classifier is presented which selects the most promising disparity value using information provided by the calculated cost curves and the pixels spatial neighborhood using a two level classification architecture. The disparity processor has been evaluated with an indoor dataset and with a real-time implementation using an FPGA and three cameras. Special care has been taken to reduce the memory | - |
dc.description.sponsorship | BOF (Bijzonder Onderzoeks Fonds uHasselt), Flanders FWO (Fonds voor Wetenschappelijk Onderzoek) and Chinese MOST (Ministry of Science and Technology) | - |
dc.language.iso | en | - |
dc.publisher | IEEE | - |
dc.subject.other | trinocular camera; real-time matching; confidence metric; computer vision; system-on-chip; FPGA | - |
dc.title | Trinocular Disparity Processor using a Hierarchic Classification Structure | - |
dc.type | Proceedings Paper | - |
local.bibliographicCitation.authors | Katkoori Srinivas | - |
local.bibliographicCitation.authors | Guthaus, Matthew | - |
local.bibliographicCitation.authors | Coskun, Ayse | - |
local.bibliographicCitation.authors | Burg, Andreas | - |
local.bibliographicCitation.authors | Reis, Ricardo | - |
local.bibliographicCitation.conferencedate | 7-10 October, 2012 | - |
local.bibliographicCitation.conferencename | 2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC) | - |
local.bibliographicCitation.conferenceplace | Santa Cruz, USA | - |
dc.identifier.epage | 250 | - |
dc.identifier.spage | 247 | - |
local.bibliographicCitation.jcat | C1 | - |
local.publisher.place | Piscataway, NJ, USA | - |
local.type.refereed | Refereed | - |
local.type.specified | Proceedings Paper | - |
dc.bibliographicCitation.oldjcat | C2 | - |
dc.identifier.doi | 10.1023/A:1017478504047 | - |
dc.identifier.isi | 000393378700043 | - |
local.bibliographicCitation.btitle | 2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC) | - |
item.validation | ecoom 2019 | - |
item.contributor | MOTTEN, Andy | - |
item.contributor | CLAESEN, Luc | - |
item.contributor | Pan, Yun | - |
item.accessRights | Open Access | - |
item.fullcitation | MOTTEN, Andy; CLAESEN, Luc & Pan, Yun (2012) Trinocular Disparity Processor using a Hierarchic Classification Structure. In: Katkoori Srinivas; Guthaus, Matthew; Coskun, Ayse; Burg, Andreas; Reis, Ricardo (Ed.). 2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC), p. 247-250.. | - |
item.fulltext | With Fulltext | - |
Appears in Collections: | Research publications |
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File | Description | Size | Format | |
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VLSI-SoC 2012 Trinocular Disparity Processor using a Hierarchical Classification Structure.pdf | 609.94 kB | Adobe PDF | View/Open |
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