Please use this identifier to cite or link to this item: http://hdl.handle.net/1942/14262
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dc.contributor.authorMOTTEN, Andy-
dc.contributor.authorCLAESEN, Luc-
dc.contributor.authorPan, Yun-
dc.date.accessioned2012-10-19T12:16:35Z-
dc.date.available2012-10-19T12:16:35Z-
dc.date.issued2012-
dc.identifier.citationKatkoori Srinivas; Guthaus, Matthew; Coskun, Ayse; Burg, Andreas; Reis, Ricardo (Ed.). 2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC), p. 247-250.-
dc.identifier.isbn9781467326582-
dc.identifier.issn2324-8432-
dc.identifier.urihttp://hdl.handle.net/1942/14262-
dc.description.abstractThis paper presents a real-time trinocular disparity processor. The core module performs a pairwise segmented window matching for both the center-right and center-left image pair as their scaled down image pairs. The resulting cost functions are combined which results into nine different curves. A hierarchical classifier is presented which selects the most promising disparity value using information provided by the calculated cost curves and the pixels spatial neighborhood using a two level classification architecture. The disparity processor has been evaluated with an indoor dataset and with a real-time implementation using an FPGA and three cameras. Special care has been taken to reduce the memory-
dc.description.sponsorshipBOF (Bijzonder Onderzoeks Fonds uHasselt), Flanders FWO (Fonds voor Wetenschappelijk Onderzoek) and Chinese MOST (Ministry of Science and Technology)-
dc.language.isoen-
dc.publisherIEEE-
dc.subject.othertrinocular camera; real-time matching; confidence metric; computer vision; system-on-chip; FPGA-
dc.titleTrinocular Disparity Processor using a Hierarchic Classification Structure-
dc.typeProceedings Paper-
local.bibliographicCitation.authorsKatkoori Srinivas-
local.bibliographicCitation.authorsGuthaus, Matthew-
local.bibliographicCitation.authorsCoskun, Ayse-
local.bibliographicCitation.authorsBurg, Andreas-
local.bibliographicCitation.authorsReis, Ricardo-
local.bibliographicCitation.conferencedate7-10 October, 2012-
local.bibliographicCitation.conferencename2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC)-
local.bibliographicCitation.conferenceplaceSanta Cruz, USA-
dc.identifier.epage250-
dc.identifier.spage247-
local.bibliographicCitation.jcatC1-
local.publisher.placePiscataway, NJ, USA-
local.type.refereedRefereed-
local.type.specifiedProceedings Paper-
dc.bibliographicCitation.oldjcatC2-
dc.identifier.doi10.1023/A:1017478504047-
dc.identifier.isi000393378700043-
local.bibliographicCitation.btitle2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC)-
item.validationecoom 2019-
item.contributorMOTTEN, Andy-
item.contributorCLAESEN, Luc-
item.contributorPan, Yun-
item.accessRightsOpen Access-
item.fullcitationMOTTEN, Andy; CLAESEN, Luc & Pan, Yun (2012) Trinocular Disparity Processor using a Hierarchic Classification Structure. In: Katkoori Srinivas; Guthaus, Matthew; Coskun, Ayse; Burg, Andreas; Reis, Ricardo (Ed.). 2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC), p. 247-250..-
item.fulltextWith Fulltext-
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