SoC and FPGA Oriented High-quality Stereo Vision System

Abstract

Stereo matching is a crucial step for acquiring depth information from stereo images. However, it is still challenging to achieve good performance in both speed and accuracy for various stereo vision applications. In this paper, a hardware-compatible stereo matching algorithm is proposed; its associated hardware implementation is also presented. The proposed algorithm can produce high-quality disparity maps with the use of mini-census transform, segmentation-based adaptive support weight and effective refinement. Moreover, the proposed implementation is optimized as a fully pipelined and scalable hardware system. The proposed design is evaluated based on the Middlebury benchmarks and the average overall error rate is 6.10%. The experimental results indicate that the accuracy is competitive with some state-of-art software implementations.