Please use this identifier to cite or link to this item: http://hdl.handle.net/1942/22853
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dc.contributor.authorLu, Yufeng-
dc.contributor.authorLuo, Xiaohua-
dc.contributor.authorWANG, Yimu-
dc.contributor.authorCLAESEN, Luc-
dc.date.accessioned2016-12-05T09:30:54Z-
dc.date.available2016-12-05T09:30:54Z-
dc.date.issued2016-
dc.identifier.citationAuras, Dominik; Leupers, Rainer; Ascheid, Gerd (Ed.). New Circuits and Systems Conference (NEWCAS), 2016 14th IEEE International, IEEE,-
dc.identifier.isbn9781467389006-
dc.identifier.issn2472-467X-
dc.identifier.urihttp://hdl.handle.net/1942/22853-
dc.description.abstractInverse warping is widely adopted to rectify the image with non-linear distortion, which is caused by the perspective feature of optical lenes. This scheme stores warping coordinate into a look-up table (LUT) to avoid complex coordinates calculations, but requires large amounts of line buffers to place image data to perform inverse warping. To reduce the line buffer usage, this paper presents a line buffer algorithm based on reading extended, which utilizes the horizontal banking to extend the reading period. The algorithm guarantees the write and read pointers dynamical jumping to provide the space for up-mapping and down-mapping. The dedicated control scheme can reduce nearly half of the memory usage in contrast to a general circular buffer of maximum offset. The image rectification module has been implemented on a FPGA to remove lens distortions in real time. The experimental results prove that the proposed line buffer algorithm is highly effective in both memory reduction and distortion rectification.-
dc.description.sponsorshipThe research in this paper was sponsored in part by the Chinese MOST (Ministry of Science and Technology) and the Belgian FWO (Flemish Research Council) bilateral cooperation project number G.0524.13.-
dc.language.isoen-
dc.publisherIEEE-
dc.relation.ispartofseriesIEEE International New Circuits and Systems Conference-
dc.rights© 2016, IEEE-
dc.subject.otherLUT; FPGA; image inverse warping; line buffer; lens distortion-
dc.subject.otherLUT; FPGA; image inverse warping; line buffer; lens distortion-
dc.titleLine Buffer Reduction for LUT-Based Real-time Image Inverse Warping-
dc.typeProceedings Paper-
local.bibliographicCitation.authorsAuras, Dominik-
local.bibliographicCitation.authorsLeupers, Rainer-
local.bibliographicCitation.authorsAscheid, Gerd-
local.bibliographicCitation.conferencedate26-29 June 2016-
local.bibliographicCitation.conferencename2016 14th IEEE International New Circuits and Systems Conference (NEWCAS)-
local.bibliographicCitation.conferenceplaceVancouver, Canada-
local.format.pages4-
local.bibliographicCitation.jcatC1-
dc.description.notes[Lu, Yufeng; Luo, Xiaohua] Zhejiang Univ, Inst VLSI Design, Hangzhou, Zhejiang, Peoples R China. [Wang, Yimu; Claesen, Luc] Hasselt Univ, Engn Technol Elect ICT Dept, Diepenbeek, Belgium.-
local.publisher.placeNew York-
local.type.refereedRefereed-
local.type.specifiedProceedings Paper-
dc.identifier.doi10.1109/NEWCAS.2016.7604780-
dc.identifier.isi000386900400046-
local.bibliographicCitation.btitleNew Circuits and Systems Conference (NEWCAS), 2016 14th IEEE International-
item.accessRightsRestricted Access-
item.fullcitationLu, Yufeng; Luo, Xiaohua; WANG, Yimu & CLAESEN, Luc (2016) Line Buffer Reduction for LUT-Based Real-time Image Inverse Warping. In: Auras, Dominik; Leupers, Rainer; Ascheid, Gerd (Ed.). New Circuits and Systems Conference (NEWCAS), 2016 14th IEEE International, IEEE,.-
item.contributorLu, Yufeng-
item.contributorLuo, Xiaohua-
item.contributorWANG, Yimu-
item.contributorCLAESEN, Luc-
item.fulltextWith Fulltext-
item.validationecoom 2017-
Appears in Collections:Research publications
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