Please use this identifier to cite or link to this item: http://hdl.handle.net/1942/23120
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dc.contributor.authorLI, Yanzhe-
dc.contributor.authorHuang, Kai-
dc.contributor.authorCLAESEN, Luc-
dc.date.accessioned2017-02-14T09:05:05Z-
dc.date.available2017-02-14T09:05:05Z-
dc.date.issued2016-
dc.identifier.citation2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), IEEE Xplore,-
dc.identifier.isbn9781509035618-
dc.identifier.issn2324-8440-
dc.identifier.urihttp://hdl.handle.net/1942/23120-
dc.description.abstractStereo matching is a crucial step to extract depth information from stereo images. However, it is still challenging to achieve good performance in both speed and accuracy for various stereo vision applications. In this paper, a hardware-compatible stereo matching algorithm is proposed and its associated hardware implementation is also presented. The proposed algorithm can produce high-quality disparity maps with the combined use of the mini-census transform, segmentation-based adaptive support weight and effective refinement. Moreover, the proposed architecture is optimized as a fully pipelined and scalable hardware system. Implemented on an Altera Stratix-IV FPGA board, it can achieve 65 frames per second (fps) for 1024 × 768 stereo images and a 64 pixel disparity range. The proposed architecture is evaluated based on the Middlebury benchmarks and the average error rate is 6.56%. The experimental results indicate that the accuracy is competitive with some state-of-the-art software implementations.-
dc.description.sponsorshipThe research in this paper was sponsored in part by the Belgian FWO (Flemish Research Council) and the Chinese MOST (Ministry of Science and Technology) bilateral cooperation project number G.0524.13.-
dc.language.isoen-
dc.publisherIEEE Xplore-
dc.relation.ispartofseriesIEEE Xplore-
dc.rights©2016 by IEEE-
dc.subject.otherstereo matching; depth calculation; census transform; SAD; SoC; system-on-chip; VLSI; AWDE; ASIC-
dc.titleSoC Oriented Real-time High-quality Stereo Vision System-
dc.typeProceedings Paper-
local.bibliographicCitation.conferencedate26-28/09/2016-
local.bibliographicCitation.conferencename2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)-
local.bibliographicCitation.conferenceplaceTalinn, Estonia-
local.format.pages6-
local.bibliographicCitation.jcatC1-
dc.description.notesLi, YZ (reprint author), Zhejiang Univ, Inst VLSI Design, Hangzhou, Zhejiang, Peoples R China. liyz@vlsi.zju.edu.cn; huangk@vlsi.zju.edu.cn; luc.claesen@uhasselt.be-
local.publisher.placeNew York-
dc.relation.references[1] C. Ttofis and T. Theocharides, “Towards accurate hardware stereo correspondence: A real-time fpga implementation of a segmentationbased adaptive support weight algorithm,” in in Proc. Design Autom. Test Eur. Conf. Exhibit. (DATE), 2012, pp. 703–708. [2] F. Tombari, S. Mattoccia, and L. Di Stefano, “Segmentation-based adaptive support for accurate stereo correspondence,” in Proceedings of the 2Nd Pacific Rim Conference on Advances in Image and Video Technology, 2007, pp. 427–438. [3] http://vision.middlebury.edu/stereo/. [4] N. Y.-C. Chang, T.-H. Tsai, B.-H. Hsu, Y.-C. Chen, and T.-S. Chang, “Algorithm and architecture of disparity estimation with mini-census adaptive support weight,” IEEE Trans. Cir. and Sys. for Video Technol., vol. 20, no. 6, pp. 792–805, Jun. 2010. [5] L. Zhang, K. Zhang, T. S. Chang, G. Lafruit, G. K. Kuzmanov, and D. Verkest, “Real-time high-definition stereo matching on fpga,” in Proceedings of the 19th ACM/SIGDA International Symposium on Field Programmable Gate Arrays. ACM, 2011, pp. 55–64. [6] A. Akin, I. Baz, A. Schmid, and Y. Leblebici, “Dynamically adaptive real-time disparity estimation hardware using iterative refinement,” Integration, the VLSI Journal, vol. 47, no. 3, pp. 365 – 376, 2014. [7] D. Scharstein and R. Szeliski, “A taxonomy and evaluation of dense two-frame stereo correspondence algorithms,” International Journal of Computer Vision, vol. 47, no. 1, pp. 7–42, 2012. [8] Y. Shan, Z. Wang, W. Wang, Y. Hao, Y. Wang, K. Tsoi, W. Luk, and H. Yang, “Fpga based memory efficient high resolution stereo vision system for video tolling,” in Field-Programmable Technology (FPT), 2012 International Conference on, Dec 2012, pp. 29–32. [9] K. Zhang, J. Lu, G. Lafruit, R. Lauwereins, and L. V. Gool, “Realtime accurate stereo with bitwise fast voting on cuda,” in Computer Vision Workshops (ICCV Workshops), 2009 IEEE 12th International Conference on, Sept 2009, pp. 794–800. [10] X. Mei, X. Sun, M. Zhou, S. Jiao, H. Wang, and X. Zhang, “On building an accurate stereo matching system on graphics hardware,” in Computer Vision Workshops (ICCV Workshops), 2011 IEEE International Conference on, Nov 2011, pp. 467–474. [11] W. Wang, J. Yan, N. Xu, Y. Wang, and F. H. Hsu, “Real-time highquality stereo vision system in fpga,” in Field-Programmable Technology (FPT), 2013 International Conference on, Dec 2013, pp. 358–361. [12] H. Hirschmuller, “Stereo processing by semiglobal matching and mutual information,” IEEE Transactions on Pattern Analysis and Machine Intelligence, vol. 30, no. 2, pp. 328–341, Feb 2008. [13] K. Zhang, J. Lu, and G. Lafruit, “Cross-based local stereo matching using orthogonal integral images,” IEEE Transactions on Circuits and Systems for Video Technology, vol. 19, no. 7, pp. 1073–1079, July 2009. [14] Y. Shan, Y. Hao, W. Wang, Y. Wang, X. Chen, H. Yang, and W. Luk, “Hardware acceleration for an accurate stereo vision system using minicensus adaptive support region,” ACM Trans. Embed. Comput. Syst., vol. 13, no. 4s, pp. 132:1–132:24, Apr. 2014. [15] Q. Yang, D. Li, L. Wang, and M. Zhang, “Fast local stereo matching using two-level adaptive cost filtering,” in 2013 IEEE International Conference on Acoustics, Speech and Signal Processing, May 2013, pp. 1986–1990.-
local.type.refereedRefereed-
local.type.specifiedProceedings Paper-
dc.identifier.doi10.1109/VLSI-SoC.2016.7753558-
dc.identifier.isi000391865200024-
local.bibliographicCitation.btitle2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)-
item.accessRightsRestricted Access-
item.validationecoom 2018-
item.contributorLI, Yanzhe-
item.contributorHuang, Kai-
item.contributorCLAESEN, Luc-
item.fulltextWith Fulltext-
item.fullcitationLI, Yanzhe; Huang, Kai & CLAESEN, Luc (2016) SoC Oriented Real-time High-quality Stereo Vision System. In: 2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), IEEE Xplore,.-
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