Please use this identifier to cite or link to this item: http://hdl.handle.net/1942/31553
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dc.contributor.authorWaldron, Niamh-
dc.contributor.authorNgoc Duy Nguyen-
dc.contributor.authorLin, Dennis-
dc.contributor.authorBRAMMERTZ, Guy-
dc.contributor.authorVincent, Benjamin-
dc.contributor.authorFirrincieli, Andrea-
dc.contributor.authorWinderick, Gillis-
dc.contributor.authorSioncke, Sonja-
dc.contributor.authorde Jaeger, Brice-
dc.contributor.authorWang, Gang-
dc.contributor.authorMitard, Jerome-
dc.contributor.authorWang, Wei-E-
dc.contributor.authorHeyns, Marc-
dc.contributor.authorCaymax, Matty-
dc.contributor.authorMEURIS, Marc-
dc.contributor.authorAbsil, Philippe-
dc.contributor.authorHoffman, Thomas Y.-
dc.date.accessioned2020-08-05T07:56:01Z-
dc.date.available2020-08-05T07:56:01Z-
dc.date.issued2011-
dc.date.submitted2020-07-31T11:35:33Z-
dc.identifier.citationDIELECTRICS IN NANOSYSTEMS -AND- GRAPHENE, GE/III-V, NANOWIRES AND EMERGING MATERIALS FOR POST-CMOS APPLICATIONS 3, ELECTROCHEMICAL SOC INC, p. 299 -309-
dc.identifier.isbn978-1-60768-214-1-
dc.identifier.isbn978-1-56677-864-0-
dc.identifier.issn1938-5862-
dc.identifier.urihttp://hdl.handle.net/1942/31553-
dc.description.abstractWe report on the fabrication of MOS capacitors on 200 mm virtual GaAs substrates using a Si CMOS processing environment. The fabricated capacitors were comparable to those processed on bulk GaAs material. Topside contact was made to the GaAs using a novel CMOS compatible self-aligned NiGe contact scheme resulting in a measured contact resistance of 0.26 Omega.cm. Cross-contamination from various III-V substrates was investigated and it was found that by limiting the thermal budget to <= 300 degrees C cross-contamination from the outgassing of In, Ga and As could be eliminated. For wet processing the judicious choice of recipe and processing conditions resulted in no significant cross-contamination being detected as determined by TXRF monitoring. This achievement enables III-V device production using state-of-the-art Si processing equipment.-
dc.description.sponsorshipThe authors acknowledge the European Commission for financial support in the DualLogic project no. 214579. Further, we thank the imec core partners with the IIAP on Logic-Dram-
dc.language.isoen-
dc.publisherELECTROCHEMICAL SOC INC-
dc.subject.otherEPITAXIAL-GROWTH-
dc.subject.otherGE-
dc.subject.otherGAAS-
dc.subject.otherSI-
dc.titleHeterogeneous Integration and Fabrication of III-V MOS Devices in a 200mm Processing Environment-
dc.typeProceedings Paper-
local.bibliographicCitation.conferencedateMAY 02-04, 2011-
local.bibliographicCitation.conferencename3rd International Symposium on Graphene, Ge/III-V, Nanowires and Emerging Materials for Post-CMOS Applications / Symposium on Tutorials in Nanotechnology-
local.bibliographicCitation.conferenceplaceMontreal, CANADA-
dc.identifier.epage309-
dc.identifier.issue3-
dc.identifier.spage299-
dc.identifier.volume35-
local.bibliographicCitation.jcatC1-
dc.description.notesWaldron, N (corresponding author), IMEC, Kapeldreef 75, B-3001 Louvain, Belgium.-
local.publisher.place65 S MAIN ST, PENNINGTON, NJ 08534-2839 USA-
local.type.refereedRefereed-
local.type.specifiedProceedings Paper-
dc.identifier.doi10.1149/1.3569922-
dc.identifier.isiWOS:000309539300027-
dc.contributor.orcidheyns, marc/0000-0002-1199-4341; Nguyen, Ngoc Duy/0000-0002-0142-1611;-
dc.contributor.orcidBrammertz, Guy/0000-0003-1404-7339-
dc.identifier.eissn1938-6737-
local.provider.typewosris-
local.bibliographicCitation.btitleDIELECTRICS IN NANOSYSTEMS -AND- GRAPHENE, GE/III-V, NANOWIRES AND EMERGING MATERIALS FOR POST-CMOS APPLICATIONS 3-
local.uhasselt.uhpubno-
local.description.affiliation[Waldron, Niamh; Lin, Dennis; Brammertz, Guy; Vincent, Benjamin; Firrincieli, Andrea; Winderick, Gillis; Sioncke, Sonja; de Jaeger, Brice; Wang, Gang; Mitard, Jerome; Wang, Wei-E; Heyns, Marc; Caymax, Matty; Meuris, Marc; Absil, Philippe; Hoffman, Thomas Y.] IMEC, B-3001 Louvain, Belgium.-
item.fulltextWith Fulltext-
item.contributorWaldron, Niamh-
item.contributorNgoc Duy Nguyen-
item.contributorLin, Dennis-
item.contributorBRAMMERTZ, Guy-
item.contributorVincent, Benjamin-
item.contributorFirrincieli, Andrea-
item.contributorWinderick, Gillis-
item.contributorSioncke, Sonja-
item.contributorde Jaeger, Brice-
item.contributorWang, Gang-
item.contributorMitard, Jerome-
item.contributorWang, Wei-E-
item.contributorHeyns, Marc-
item.contributorCaymax, Matty-
item.contributorMEURIS, Marc-
item.contributorAbsil, Philippe-
item.contributorHoffman, Thomas Y.-
item.fullcitationWaldron, Niamh; Ngoc Duy Nguyen; Lin, Dennis; BRAMMERTZ, Guy; Vincent, Benjamin; Firrincieli, Andrea; Winderick, Gillis; Sioncke, Sonja; de Jaeger, Brice; Wang, Gang; Mitard, Jerome; Wang, Wei-E; Heyns, Marc; Caymax, Matty; MEURIS, Marc; Absil, Philippe & Hoffman, Thomas Y. (2011) Heterogeneous Integration and Fabrication of III-V MOS Devices in a 200mm Processing Environment. In: DIELECTRICS IN NANOSYSTEMS -AND- GRAPHENE, GE/III-V, NANOWIRES AND EMERGING MATERIALS FOR POST-CMOS APPLICATIONS 3, ELECTROCHEMICAL SOC INC, p. 299 -309.-
item.accessRightsRestricted Access-
Appears in Collections:Research publications
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