Suitability Study of Oxide/Gallium Arsenide Interfaces for MOSFET Applications

Abstract

The suitability of oxide/GaAs interfaces for MOSFET applications has been investigated. Electrical properties of Ga2O3/GaAs interfaces, dielectric stacks utilizing the Ga2O3/GaAs interface, and Al2O3/GaAs interfaces have been studied using a set of independent techniques, including admittance-voltage (ac C-V and G-V at 25 degrees C and 150 degrees C), quasi-static static C-V, photoluminescence intensity (PL-I), and MOSFET I-V measurements. The side-by-side comparison reveals the fundamental differences in their respective data sets. The GdGaO/Ga2O3/GaAs system has been found to exhibit a U-shaped D-it distribution with a midgap D-it plateau of 2 - 3 x 10(11) cm(-2) . eV(-1), which has allowed manufacturing GaAs MOSFETs with dc performance close to ideal model predictions. Some other ternary oxides such as GdScO3 and LaAlO3 can also be deposited on a Ga2O3 template without disrupting the Ga2O3/GaAs interface. Beyond GaAs bulk, the use of a surface heterostructure has been investigated, which shifts, in energy space, the mobile charge distribution in the channel layer away from a branch of rising Dit in the vicinity of E-c at the Ga2O3/GaAs interface. In contrast, Al2O3/GaAs(100) interfaces show a typical GaAs native oxide behavior with a delta-shaped D-it distribution centered around the midgap and a pinned Fermi level. Although this study has been conducted with the objective of developing GaAs MOSFETs for RF power applications, it is recommended to apply an identical set of independent analytical techniques to the characterization of dielectric/semiconductor interfaces which are of interest for high-mobility CMOS channels such as InxGa1-xAs.