Embedded FPGA for cryptography

Abstract

Cryptography is an important feature in modern devices, especially in the Internet of Things (IoT). When a deployed cryptographic algorithm is not considered secure anymore, tons of IoT devices are vulnerable to attacks that manipulate the device or retrieve secret information.

In 2018, Mentens et al. proposed to use a small embedded FPGA (eFPGA) for symmetric-key cryptography. The eFPGA allows to update the hardware implementation of the cryptographic algorithm when it is not considered secure anymore. This way, the flexibility properties of software are combined with the efficiency properties of hardware.

In this master's thesis, we compared the eFPGA structure proposed by Mentens et al. to a classical Lookup Table (LUT) based FPGA. The added value of the thesis over the initial experiment conducted by Mentens et al., is the extension of the results from only logic cells only to a fully placed and routed eFPGA structure, based on an open-source design flow.

This thesis concludes that the originally proposed eFPGA structure leads to a reduction of the logic cell area compared to LUT-based FPGAs. However, the overhead of the routing in the novel eFPGA architecture leads to an increase in the total area compared to LUT-based FPGAs.