How (not) to manage blade-coating of perovskite on industrial textured silicon wafers for upscaling tandems

Abstract

To enable solution processing of perovskites (Pk) on textured silicon (Si), we need to scale down the feature size of the front surface texture and/or deposit thick Pk that embed the entire texture of the Si surface to produce planarized Pk layers. In this work, we discuss the pathways to achieve sub-micron pyramids by studying the impact of surface and processing conditions. Pyramids with a median height of 0.59±0.2 mm was achieved. Pk was blade coated on various types of Si textures. Time-resolved photoluminescence measurements were performed to evaluate the electrical quality of the Pk films, which shows decreasing lifetimes with increasing pyramid heights. SEM was done to study the morphology of the Pk on textures. HR-SEM, XRD, and tandem cell studies are under progress.