The use of early resistance and early tcr changes to predict the reliability of on-chip interconnects

Abstract

A new method is presented to evaluate the resistance to electromigration of on-chip interconnects. The method is based on the high resolution in-situ electrical resistance technique. During high temperature and high current density stress measurements, two types of processes occur simultaneously: structure-relaxation and electromigration. In order to study these processes separately, the experimental conditions are adapted. The electrical resistance and TCR is measured before and after structure-relaxation and/or electromigration. Using Matthiessen's rule, it is possible to separate the contribution of the resistivity variation from the variation in geometry. The first process causes a decrease of the resistivity, whereas the second causes an increase. The influence of Cu-addition and deposition temperature is also investigated. Correlation of the resistivity variations with conventional mean time to failure (MTTF) data is demonstrated. As a consequence, with our short-time method, predictions of the resistance to electromigration of on-chip interconnects can be made after typical test times of 24 to 48 hours.