Please use this identifier to cite or link to this item: http://hdl.handle.net/1942/14262
Title: Trinocular Disparity Processor using a Hierarchic Classification Structure
Authors: MOTTEN, Andy 
CLAESEN, Luc 
Pan, Yun
Issue Date: 2012
Publisher: IEEE
Source: Katkoori Srinivas; Guthaus, Matthew; Coskun, Ayse; Burg, Andreas; Reis, Ricardo (Ed.). 2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC), p. 247-250.
Abstract: This paper presents a real-time trinocular disparity processor. The core module performs a pairwise segmented window matching for both the center-right and center-left image pair as their scaled down image pairs. The resulting cost functions are combined which results into nine different curves. A hierarchical classifier is presented which selects the most promising disparity value using information provided by the calculated cost curves and the pixels spatial neighborhood using a two level classification architecture. The disparity processor has been evaluated with an indoor dataset and with a real-time implementation using an FPGA and three cameras. Special care has been taken to reduce the memory
Keywords: trinocular camera; real-time matching; confidence metric; computer vision; system-on-chip; FPGA
Document URI: http://hdl.handle.net/1942/14262
ISBN: 9781467326582
DOI: 10.1023/A:1017478504047
ISI #: 000393378700043
Category: C1
Type: Proceedings Paper
Validations: ecoom 2019
Appears in Collections:Research publications

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