Please use this identifier to cite or link to this item: http://hdl.handle.net/1942/14263
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dc.contributor.authorMOTTEN, Andy-
dc.contributor.authorCLAESEN, Luc-
dc.contributor.authorPan, Yun-
dc.date.accessioned2012-10-19T12:28:55Z-
dc.date.available2012-10-19T12:28:55Z-
dc.date.issued2012-
dc.identifier.citationTahar, Sofiene; Byrd, Greg; Schneider, Klaus; Pradip, Bose (Ed.). 2012 IEEE 30th International Conference on Computer Design (ICCD), p. 466-471-
dc.identifier.isbn978-1-4673-3050-3-
dc.identifier.issn1063-6404-
dc.identifier.urihttp://hdl.handle.net/1942/14263-
dc.description.abstractThis paper presents a real time image warping module implemented in hardware. A look-up table (LUT) based reverse mapping is used to relate the source image to the warped image. Frame buffers or line buffers are often used to temporally store the source image. However these methods do not take the underlying pattern of the reverse mapping coordinates into account. The presented architecture uses an adaptable memory allocation which can change the depth and the position of the line buffer between lines. A real-time stereo rectification use case has been implemented to validate the operation of this module. Depending on the scenario, the memory consumption can be reduced by a factor of two and more. A real-time image warping module for video cameras has been implemented in a single FPGA, without the use of off-chip memories.-
dc.description.sponsorshipFlanders FWO (Fonds voor Wetenschappelijk Onderzoek) and China MOST (Ministry of Science and Technology)-
dc.language.isoen-
dc.publisherIEEE-
dc.subject.otherwarping; real-time; rectification; memory architecture; system-on-chip; FPGA-
dc.titleAdaptive Memory Architecture for Real-Time Image Warping-
dc.typeProceedings Paper-
local.bibliographicCitation.authorsTahar, Sofiene-
local.bibliographicCitation.authorsByrd, Greg-
local.bibliographicCitation.authorsSchneider, Klaus-
local.bibliographicCitation.authorsPradip, Bose-
local.bibliographicCitation.conferencedate30 September - 3 October, 2012-
local.bibliographicCitation.conferencename2012 IEEE 30th International Conference on Computer Design (ICCD)-
local.bibliographicCitation.conferenceplaceMontreal, Canada-
dc.identifier.epage471-
dc.identifier.spage466-
local.bibliographicCitation.jcatC1-
dc.description.notesReprint Address: Motten, A (reprint author), Hasselt Univ, tUL, IBBT, Expertise Ctr Digital Media, Diepenbeek, Belgium. Addresses: Hasselt Univ, tUL, IBBT, Expertise Ctr Digital Media, Diepenbeek, Belgium-
local.publisher.placePiscataway, NJ, USA-
dc.relation.referencesD. King, "Applications for real time image warping," in Conference Record IEEE Southcon-1996, 1996, pp.298-302. R. Melo, J.P. Barreto and G. Falcao, "A New Solution for Camera Calibration and Real-Time Image Distortion Correction in Medical Endoscopy-Initial Technical Evaluation," IEEE Transactions on Biomedical Engineering, vol. 59 (3), 2012, pp.634-644. F. Huang, R. Klette, J-C Tien and Y-W Chang, "Rotating sensor-matrix camera calibration," in Proceedings IEEE ICIP-2010, 17th International Conference on Image Processing, 2010, pp.4245-4248. A. Motten, and L. Claesen, "Low-cost real-time stereo vision hardware with binary confidence metric and disparity refinement," in Proceedings IEEE ICMT-2011, International Conference on Multimedia Technology, 2011, pp.3559-3562. L. Luo, C. Wang, J. Chen, S. An, Y. Jeung and J. Chong, "Improved LUT-Based Image Warping for Video Cameras," in Proceedings IEEE CSE-2011, 14th International Conference on Computational Science and Engineering, 2011, pp.453-460. S. Oh and G. Kim, "FPGA-based fast image warping with data-parallelization schemes, " IEEE Transactions on Consumer Electronics, vol. 54 (4), 2008, pp.2053-2059. J.G.P. Rodrigues and J.C. Ferreira, "FPGA-based rectification of stereo images," in Proceedings IEEE DASIP-2010, Conference on Design and Architectures for Signal and Image Processing, 2010, pp.199-206. K.T. Gribbon and D.G. Bailey, "A novel approach to real-time bilinear interpolation," in Proceedings IEEE DELTA 2004, Second IEEE International Workshop on Electronic Design, Test and Applications, 2004, pp.126-131.-
local.type.refereedRefereed-
local.type.specifiedProceedings Paper-
dc.bibliographicCitation.oldjcatC2-
dc.identifier.doi10.1109/ICCD.2012.6378680-
dc.identifier.isi000316948500074-
local.bibliographicCitation.btitle2012 IEEE 30th International Conference on Computer Design (ICCD)-
item.accessRightsOpen Access-
item.contributorMOTTEN, Andy-
item.contributorCLAESEN, Luc-
item.contributorPan, Yun-
item.fullcitationMOTTEN, Andy; CLAESEN, Luc & Pan, Yun (2012) Adaptive Memory Architecture for Real-Time Image Warping. In: Tahar, Sofiene; Byrd, Greg; Schneider, Klaus; Pradip, Bose (Ed.). 2012 IEEE 30th International Conference on Computer Design (ICCD), p. 466-471.-
item.validationecoom 2014-
item.fulltextWith Fulltext-
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