Please use this identifier to cite or link to this item:
http://hdl.handle.net/1942/36168
Title: | Practical Challenges of High-Power IGBT's I-V Curve Measurement and Its Importance in Reliability Analysis | Authors: | ALAVI, Omid VAN CAPPELLEN, Leander DE CEUNINCK, Ward DAENEN, Michael |
Issue Date: | 2021 | Publisher: | MDPI | Source: | Electronics (Basel), 10 (17) (Art N° 2095) | Abstract: | This paper examines the practical challenges of simplified setups aimed at achieving high-power IGBTs' I-C-V-CE curve. The slope of this I-V curve (which is defined as on-resistance R-CE) and the point where the V-CE-V-GE curve visibly bends (threshold gate voltage) can be suitable failure precursor parameters to determine an IGBT's health condition. A simplified/affordable design for these specific measurements can be used for in-situ condition monitoring or field testing of switching devices. First, the possible I-V curve measurement methods are discussed in detail in order to prevent self-heating. The selected design includes two IGBTs in which the high-side IGBT was the device under test (DUT) with a constant gate voltage (V-GE) of 15 V. Then, the low-side IGBT was switched by a short pulse (50 mu s) to impose a high-current pulse on the DUT. The V-CE-V-GE curve was also extracted as an important failure-precursor indicator. In the next stage, a power-cycling test was performed, and the impact of degradation on the IGBT was analyzed by these measurement methods. The results show that after 18,000 thermal cycles, a visible shift in I-V curve can be seen. The internal resistance increased by 13%, while the initial collector-emitter voltage and voltage at the knee point in the V-CE-V-GE curve slightly changed. It is likely that in our case, during the performed power-cycling test and aging process, the bond wires were most affected, but this hypothesis needs further investigation. | Notes: | Alavi, O (corresponding author), Hasselt Univ, IMO IMOMEC, Wetenschapspk 1, B-3590 Diepenbeek, Belgium.; Alavi, O (corresponding author), IMEC, Kapeldreef 75, B-3001 Heverlee, Belgium.; Alavi, O (corresponding author), EnergyVille, Thor Pk 8310, B-3600 Genk, Belgium. omid.alavi@uhasselt.be; leander.vancappellen@uhasselt.be; ward.deceuninck@uhasselt.be; michael.daenen@uhasselt.be |
Keywords: | accelerated aging;electronic packaging thermal management;lifetime estimation;power electronics;semiconductor device reliability | Document URI: | http://hdl.handle.net/1942/36168 | e-ISSN: | 2079-9292 | DOI: | 10.3390/electronics10172095 | ISI #: | WOS:000694063700001 | Rights: | 2021 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https:// creativecommons.org/licenses/by/4.0/ | Category: | A1 | Type: | Journal Contribution | Validations: | ecoom 2022 |
Appears in Collections: | Research publications |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
electronics-10-02095.pdf | Published version | 7.94 MB | Adobe PDF | View/Open |
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.