Please use this identifier to cite or link to this item: http://hdl.handle.net/1942/9047
Title: Watermark-induced high-density via failures in submicron CMOS fabrication (May 2006)
Authors: Chew, Alex
Au, Hing Ho
Han, S. H.
Neo, T. L.
Tan, Jackson
Chai, K. W.
Chua, Samuel
Issue Date: 2007
Publisher: IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Source: IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING. p. 195-200.
Abstract: Laureen Carbonell received the diploma in chemistry from the Ecole Nationale Superieure de Chimie de Toulouse (ENSCT), France, in 1996, From 1997 until 2000, she carried out her Ph.D. degree in materials science at the Laboratoire de Mineralogic-Cristallographie de Paris (LMCP), France, focusing on the epitaxial growth and characterization of ferromagnetic layers onto ZnSe-based semiconductors. Since 2000; she has been with the Interuniversity Microelectronics Center (IMEC), Leuven, Belgium, where her R&D activity has been focusing on copper electroplating in sub-100-nm interconnects. She has authored and coauthored more than 40 publications
Notes: Interuniv Microelectron Ctr, Louvain, Belgium. Interuniv Microelectron Ctr, Max Planck Inst, Dusseldorf, Germany. Hasselt Univ, Inst Mat Res, Dept Phys, Interuniv Microelectron Ctr, Louvain, Belgium. European Ctr Nucl Res, Italian Natl Inst Nucl Phys, Louvain, Belgium. Interuniv Microelectron Ctr, Louvain, Belgium. Interuniv Microelecton Ctr, Louvain, Belgium. Interuniv Microelectron Ctr, Fund Sci Res Flanders, Louvain, Belgium.
Keywords: via oxide; W plug
Document URI: http://hdl.handle.net/1942/9047
ISI #: 000248669800002
Category: C1
Type: Proceedings Paper
Validations: ecoom 2008
Appears in Collections:Research publications

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