Please use this identifier to cite or link to this item:
http://hdl.handle.net/1942/13268
Title: | Real-Time Stereo Vision Hardware Architecture Suitable for Multiple Platforms | Authors: | MOTTEN, Andy CLAESEN, Luc |
Issue Date: | 2010 | Source: | 3D Stereo Media 2010 | Abstract: | This paper presents a real-time stereo vision Systemon- Chip (SoC) architecture for a depth-field generation processor as required in 3D TV applications. This architecture is fully scalable and parameterizable to allow for custom SoC implementations, as well as rapid prototyping on FPGAs. An onchip memory block architecture is used that allows parallel access to all pixels located in a chosen window of the image. A real-time stereo matching calculation at a frame rate of 56 Hz with a resolution of 800x600, a disparity of 80 and a window size of 11x11 has been realized using this architecture without the need for external memories. | Keywords: | real-time stereo matching; adaptable window; computer vision; Parallel memory architecture; system-on-chip; FPGA | Document URI: | http://hdl.handle.net/1942/13268 | Category: | C2 | Type: | Proceedings Paper |
Appears in Collections: | Research publications |
Files in This Item:
File | Description | Size | Format | |
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Real-Time Stereo Vision Hardware Architecture Suitable for Multiple Platforms.pdf | 612.05 kB | Adobe PDF | View/Open |
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